The announcement says quite a few things of interest.
"... We are pleased to provide an interim progress report as to the activities outlined at the Annual General Meeting held on 26 May 2020.
A total of 23 wafers containing simplified and full structures have been advanced by the vendor to completion. These wafers include the necessary metal layers required for chip assembly and packaging.
Simultaneously the Company has completedmultiple versions of autonomous electronics controlsintended for use in sampling our packaged devices, independently of our wafer prober and outside of our cleanroom.
Concurrently the company has completed development of a highly advanced measurement tool that enables precision measurement and subsequent algorithmic synchronisation to further maximize the devices acoustic output.
All aforementioned activities are guided to coalesce within the timelines described at the AGM and upon receipt of packaged chips from the vendors.
1 I think that the wafers contain around 150 MEMS devices each. Wafers included both partial and full structures presumably so the functional parts could be tested at different stages of processing. The partial structures were made to evaluate the functionality of the MEMS against all of the stiction issues etc that plagued the first batches. These were then found to make pretty good sound in their own right and may become a viable independent product. Here we are told both types of structure have been taken through to completion. I can only assume completion means that supposedly fully optimised designs have been progressed through all their stages, including fixing stiction issues, wafer inversion and back side processing without debris, elimination of residues, and final metallisation so that contacts can be installed ready for die singulation and packaging into a chip. This would be the stage that would be obtained if all processes have worked out correctly: i.e. these are destined for packaging as finished chips ready for performance testing. Until this happens we do not know how they will perform, but in-production testing would presumably have confirmed that these work as expected and ought to be taken through to this final stage. i.e. there is every expectation that they will be turned into finished chips ready for customer demo and sampling.
2 Demo units (i.e. mock-ups) have been designed and built that will enable the demo chips in different formats and array multiples to be exercised and demoed to prospective customers. This is essential for demonstration, and as a necessary step this has been described as having been completed. i.e. these appear to be sitting on a shelf somewhere ready for use.
3 Evaluation equipment for the finished wafers and dies (and maybe for the finished chips) has been built and presumably has been used to fully optimise the acoustic performance (i.e. MEMS operating synchronisation) and functionality.
4 All of these processes have been conducted to converge (a better word than coalesce I think) at the same time, enabling everything that is needed to have optimised, functional, and checked-off certified chips ready to demo.
Just to refer everyone back to the AGM presentation I have attached the following:
This is what is being done during
this current quarter ("Upcoming Quarter"). This shows the tasks the current announcement refers to.
(20min delay)