Hmmmm, you know what Unc, I don't know shit but here's a quick guide to where 8tey feels this goes..
All I know is that if it looks like a duck & quacks like a duck then chances are once revealed, it will be a duck..
ARM in partnership with BRN links it to Imec Apple & Samsung.. Prob Intel & Tesla too but Elon has to concede before he can switch camps.
It's all by stealth FFS... BRN is in bed with everyone and will simply stand up one day and be inside everything like Intel once was..
Samsung is def in the house with WD & what do you know... ??
They both done gone and created a Storage Class Memory Market complete with high speed, de bottlenecked compatible plug and play type supporting infrastructure for SSD's already.. SOC next if not already IMO
In other words they have shortened the ramp time by years for any new nvm tech to emerge.....
Wilbert called it... Both Nand & DRAM come from specific factories, not foundaries and who is the biggest baddest factory maker of dram on the planet.... Damned if I know.... DYOR or contact Saucey Boi
8tey
Samsung however gets interesting cause they are in everything.. Sorta like white on rice.. Apple Mac v Lenovo Lappie with Samsung NVMeSSD's
17 August 2021
4DS TECHNICAL UPDATE
• New process breakthroughs have made 4DS’ Interface Switching ReRAM technology fully compatible
with
state-of-the-art high-volume DRAM and NAND production processes
• Third Non-Platform Lot wafers yielded an order of magnitude decrease in cell on-resistance, which
translates into an up to
one order of magnitude boost in read speed
• Second Platform Lot wafers demonstrated both device-scaling to imec’s
minimum geometry and
memory switching with an access device on 300mm wafers using state-of-the-art production
equipment
• Third Platform Lot utilizing
imec’s megabit memory platform is planned to start late Q3 2021
• HGST (100% subsidiary of Western Digital Inc) requests technical update to share the detailed results
of these two lots
4DS has for the first time demonstrated fabrication of fully crystalline Pr1-xCaxMnO3 (“PCMO”
at temperatures
compatible with the advanced processes run
in today’s leading-edge high-volume memory DRAM and NAND
factories;
− 4DS has demonstrated that this fully crystalline PCMO material reduces the cell on-resistance by an order of
magnitude compared to the PCMO material fabricated in the Second Non-Platform Lot. This reduction in cell
on-resistance directly translates into a significant improvement in read speed; and
− This significant performance improvement also means that full characterization (speed, endurance, retention)
of memory cells with this fully crystalline PCMO material requires memory cells operating in a memory array
where currents are controlled and limited by access devices.
Both finFETs and GAAFETs can be mass-produced using the same process tools and manufacturing methods. When chip manufacturers shifted to new gate-all-around transistor technologies, they did not have to invest in new processes or manufacturing equipment. The easy transition from finFET to GAAFET fabrication reduced costs and allowed manufacturers to quickly implement these new technologies.
By comparing finFET vs. GAAFET technologies, it can be summarized that gate-all-around transistors are the future of integrated circuits. Their design flexibility, low operational voltage, high drive currents, high computational speed, and excellent performance within a smaller footprint area will continue to make them advantageous.
We also reported in August that our attempt to put that cell into a memory array, where the memory cell is driven by a transistor, had failed because of misprocessing. And we had, of course, after the misprocessing you need to go analyze what went wrong. We had extensive discussions with
IMEC, which is our foundry partner, and we had identified our paths forward, and we had communicated that in August.
That we were gonna switch to a different platform. We were gonna have a one-megabit array, and that was the path forward.
So today,
if you look at DRAM, if you look at NAND those are not made in foundries,
they’re made in stand-alone dedicated factories that only do that type of technology. And those fabs as a minimum, cost $5 billion to start.
It depends on how convincing our solution is, that depends on what the internal solutions are for the customers, the market dynamics, but a critical deliverable before we can even consider talking to potential acquirers is provide that memory macro, that memory array data to the people.
To quote an unnamed executive of one of our potential acquirers is, “We get an idea for a new memory stack once a week.”
The relatively spartan announcement from Samsung, which comes on the final day of Q2, announces that Samsung has begun production of chips on a GAAFET-enabled 3nm production line. The company is not disclosing the specific version of the node used here, but based on previous Samsung roadmaps, this is undoubtedly Samsung’s initial 3GAE process – essentially, Samsung’s earliest process node within a family. According to Samsung, the line will initially be used to produce chips for “high performance, low power computing”, with mobile processors to come later.
Samsung’s early process nodes are traditionally reserved for the company’s internal use, so while Samsung isn’t announcing any specific 3nm chips today, it’s only a matter of time until we see a 3nm SoC announces from Samsung LSI.
Samsung has, for the most part, been quiet about its progress on 3nm/GAAFET this year. The last significant news we heard from the company on the matter was several months ago at the company’s Foundry Forum event, where the company reiterated plans to get 3GAE into production by the end of 2022. Given the previous silence and the cutting-edge nature of the technology, there had been more than some concern that 3GAE would be delayed past 2022 – adding on to delays that pushed the tech out of its original 2021 launch window – but with today’s announcement Samsung seems to want to put that to rest.
(20min delay)