4DS - Anything but Charting, page-25165

4DS Memory continually updates Western Digital on all development’s at imec (confirmed by David). Western Digital provided 4DS Memory a set of parameters they would like to see from the megabit chip (confirmed by Dr WvdH). Western Digital also set the direction with the Additional Wafer Lot which saw best ever recorded speeds and endurance back in June 2020.

With regards to the development stage, 4DS and imec are integrating “non-filament” interface switching ReRAM” memory cells onto imec’s megabit memory array.

The above development stage may or may not be deferred and all depends on the newly introduced “unexpected” problem.

Will have to wait and see how this point plays out. But whatever the outcome is, it needs to give shareholders no doubt that it will be resolved and that the process to get from A to B will be fast tracked without compromise.

Company Announcement’s in general needs to be addressed and believe they do more damage to share price then what actually happens in the cleanrooms.

The statement “long term delay” should never have been used in the last announcement. This compounded the market’s negative reaction. A statement like that should have been reserved until the root cause analysis was completed. At that point 4DS could provide a detailed plan with time associated timelines that make sense. Machine Gun announcements lobbed with a grenade need to stop.

For example, “No storage class memory market” this statement was announced by 4DS and the market while already negative on Second Platform Lot integration results, also took issue with the statement “No storage class memory market”. Dr WvdH agreed that it was poor choice of words and what they were trying to articulate is 4DS Memory were defining a new memory space for storage class memory. I don’t believe the market would have taken issue with that.

Anyway, waiting for the new development plan to get us to megabit chip.