The issue is the array structure now requires a full Megabit chip to properly characterise it. You can't do it in a non platform lot. So you can't have function tests as you progress that confirm the chips viability. You have to take it through the BEOL.
It's pretty weird though that IMEC didn't put the finished chips on the bench to give them a run and satisfy their curiosity?
I mean if you were one of the few Nissan engineers that is qualified by the company to hand build the Nissan GTR engine, surely you'd take one out on the track at some stage yeah?
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