4DS (ASX) Ann: Company Update

Originally posted by Flectional: ↑

directly applicable K - mainly due to the fact that the company provides minimal clarity in an understanding or potential resolution of a known repeating defect....that's where its at imo atm

battle of the highlighter continues

from the update shown...
Root cause action process??
unfortunately a root cause analysis has not been completed - these 2 are very different process investigations
I understand the 2nd perfectly - the first is inconclusive and not 'root cause'...why- enough time has not elapsed for a comprehensive RCA to be completed and IMEC extension negotiations would be pending this outcome due to the fact they would be undertaking the analysis.....
that in itself is a red flag for mine as 'new material' engineering is conducted under instruction by the client (4DS) to the fab...seems unlikely this has transpired

Most likely cause of the poor electrical performance ? ...definitive? ...nope
ambiguous statement at best as to the underlying root cause for the poor electrical performance...remember the previous post was pointing to similar PCMO issue experienced predominantly by the companies in the field manufacturing this material as a memory...considerable endeavor by considerable companies
4DS believes the etch process has induced damage to the crystallinity of 4DS pcmo ???

for mine there is a lot of fiddling at the edges ....something far more substantive needs to be provided to demonstrate these unclarified issues are understood and resolved

as I replied to 56 ....these are well known industry issues with PCMO ....chance of a buyer popping up until there is absolute clarity in the resolution and functionality of the repeating defect is not likely....to put it mildly

It is well understood the speed and endurance could well be industry high bench mark as the R&D continues to show...that is why pcmo attracts so much attention and is functional at 40nm...appears the 'root cause' is much deeper and at scale as has also been demonstrated by those other acknowledged companies working the material

all speculation of course K ....as per company releases and updates .....can only go on the information supplied

Expand

Sorry, I am going to have to again disagree.

The issue you point out with regards to Platform 3 is by no means a fundamental technology issue. 4DS Memory while focused on resolving the etch residue issue added new process conditions that simply do not work. What you need to look at is Platform 2 and use that as a base for what we can expect moving forward. Platform 3 was a disaster / total write-off.

Base process conditions from Platform 2 and research completed at Stanford post Platform 3; would have allowed 4DS to find that optimum needed to achieve a fully functioning Non-Filament Interface Switching ReRAM Megabit chip with zero defects.

Platform 2 - Confirms the Following

#New process breakthroughs have made 4DS’ Interface Switching ReRAM technology fully compatible with state-of-the-art high-volume DRAM and NAND production processes

#Second Platform Lot wafers demonstrated scalability of its memory cell to the smallest cell geometries supported on imec’s memory platform / 300mm wafers using state-of-the-art process equipment

#Second Platform Lot wafers demonstrated memory cell switching using an access device which is a critical step for producing a functional megabit memory array

The below announcement would have never been made if a megabit chip was not achievable.