I think most of us were already aware of some of the ‘historical’ disadvantages of ReRAM and is likely the reason why some ‘players’ in the industry are not looking at ReRAM as the answer.
My post was just a reminder of the issues that were/are potential problems for us.
Being non-filamentary and area based makes us unique and has given us the ability to address some if not all of the disadvantages…. Like endurance, persistence and scalability (now attempting to scale down further to 20nm proving further scalability). The write and read cycle issues with damaging adjacent cells may also have been solved noting there is no need for error correction in our write cycles.
We still don’t know the all important yield data or cost of production, but the assumption is we wouldn’t be continuing with this if we weren’t already deemed competitive in the cost domain. PL6 is designed to ensure that competitiveness.
I assume your statement about TSMC being more advanced than 4DS in ReRAM refers to being production rather than the tech being more advanced. We already know we are the only ones using the non-filamentary approach.
I am hopeful that once 4DS/IMEC have proven up at 20nm some of those ‘disinterested’ players might come into play again.
Clearly, we wouldn’t be wasting our time on this if 4DS/IMEC weren’t confident ‘non-filamentary’ ReRAM could mitigate those disadvantages either partly or completely.
In other words if we weren’t likely to be competitive then I don’t think we would still be here.
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