Has anyone seen news stating that they have commenced processing of Lot 4? If I was to assume that they started mid July, then Lot 4 results are expected some time in mid-September to mid-October to double check, triple check, tweak/tune.
20th June the announcement stated the following:
• Wafer D10 in Lot 3 produced the best results • Processing of fourth iteration of wafers (“Lot 4”) to commence within weeks • Lot 4 will comprise 2 sets of 23 wafers, which will be processed in parallel, and with the results oftheir analysis expected to be announced during Q3 of 2019• Lot 4 is potentially the final iteration before integration with imec’s 1 megabit memory platformcommences • Ten additional patent applications filed to strengthen the Company’s intellectual property position
4DS Price at posting:
5.1¢ Sentiment: Buy Disclosure: Held
