Thanks BobF, very helpful.
Irrespective of whether the 4-unit demonstrator is being developed on-wafer or as 4 separate assembled chips (I agree the former would be expensive and wasteful), this raises some interesting questions on the setup of multi-chip configurations.
'Tuning' the algorithm for various multi-chip configurations.
I imagine that the algorithm for multi-chip configuration will need to be modified for the specific chip setup, including the spatial layout of the chips.
ie. if the 4 chips are arranged 2x2, with say 3 mm between the pixel arrays, that would need a different algorithm to optimise sound output than if the chips were arranged in a row of 4x1, (say at each of the top corners of a flat screen TV) with 2mm between the chips.
I wonder if the package of support AKP are developing for vendors will include a capability to enable vendors to 'tune' the algorithm for their respective chip configurations and spatial dynamics.
.
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