They have mentioned that the upper limits of retention have not yet been detetmined. Though those metrics will remain confidential when they become available, it is logical that retention in earlier non platform lots is being monitored to its upper limits i.e. breaking point.
They have solid (undisclosed) numbers regarding near DRAM speed and endurance being in the millions of cycles. But with retention, I think because it can go out to years, modelling is employed to project a result based on the measurable rate of decline.
In other words, I believe that active lab work and the kitchen sink are being engaged by the technical staff. I feel good about the reported progress so far. Here's hoping it all pans out and an irresistable picture of speed, endurance, retention, yield, power consumption and cost is presented to relevant corporate interests in the near future.
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