| Introduction to the application of FanFET in 3D-NAND Flash |
| Wang Zhenzhi/CEO of Hanseatic Technology |
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| Editor's note: NAND is a type of non-volatile memory. Because NAND has the characteristics of storing data in the event of a power failure, it is used as a Pen Drive, Flash Card, and SSD to store data. However, as people’s demands continue to increase, and limited by the area of storage, planar 2D-NAND capacity has reached the limit of its development. It is difficult to continuously expand SSD capacity with 2D-NAND. Therefore, 3D-NAND should come into play. Born. In 3D-NAND, multiple layers of memory cells are stacked vertically and interconnected between layers. Stacking multiple layers of memory cells vertically can use a smaller space to build larger storage capacity, and improve performance by shortening the connection of each memory cell. Compared with 2D-NAND, it also reduces the cost per bit. This article introduces a FanFET 3D-NAND Flash with three-dimensional stacking technology independently developed by Hansa Technology, a startup company in Taiwan, which is an alternative to the GAA (Gate-All-Around) structure. |
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| 3D-NAND Flash is a flash memory chip manufactured in a fab using three-dimensional stacking technology. It is widely used in memory cards, mobile devices, 3C electronics, and cloud storage systems. At present, the global flash memory manufacturers are mainly based on Gate-All-Around (GAA) technology. The four major global flash memory chip manufacturers are Japan’s Kioxia (including Western Digital WDC, San Disk, Micron (including Intel) of the United States, Samsung (Samsung) of South Korea, and SK Hynix (SK Hynix) have a total market share of approximately 99%. The global revenue of 3D flash memory in 2020 is approximately 55 billion U.S. dollars, with an average compound annual growth rate (CAGR) of 9%. |
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| The FanFET 3D-NAND Flash with three-dimensional stacking technology introduced in this article has the characteristics of high capacity density, process modularization, and low development cost, and can complete nano-level innovative semiconductor technology by using DUV yellow light machine. Before introducing the overview of FanFET 3D-NAND Flash and the related comparison with GAA, first introduce the current mainstream GAA transistors and introduce the relationship with FinFET technology, and then explain GAA's 3D-NAND Flash Technology. . |
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| GAA and FinFET |
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| At present, the global fabs’ transistor technology competition is almost focused on the 5nm~3nm fin transistor (FinFET) or 3nm~2nm wrap-around gate (GAA) process, while the semiconductor giants Taiwan Semiconductor Manufacturing Co. (TSMC) and Samsung (Samsung), Intel (intel) and International Machines (IBM) will compete in the battle for the leader of the transistor in the future, eagerly and brilliantly, striving for the chance of becoming the last big winner. The current mainstream logic product is 5nm FinFET. In the future, the FinFET structure below 5nm will "evolve" into a GAA structure, and the current will be level. The 3D structure of the mainstream flash memory product 3D-NAND Flash is GAA, but the current is vertical. Strictly speaking, GAA can be used as a vertical current 3D-NAND Flash, or as a horizontal current logic product (this technology is also called GAAFET, MBCFET, CFET), but the process integration and flow of memory and logic products are very different different. The GAA technology description in this article focuses on vertical current 3D-NAND Flash. Figure 1 shows the types of global memory and its compound annual growth rate. The mainstream memory DRAM and NAND account for about 95% of the total memory. |
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| Figure 1. The market share and compound annual growth rate of each category of global memory: mainstream memory DRAM and NAND account for about 95% of the total memory market |
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| . Source: Yole Development; July, 2020 |
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| GAA's 3D-NAND Flash technology |
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| Now back to the three-dimensional structure of the flash memory 3D-NAND Flash. Figure 2(a) shows the appearance, coordinates, and endpoints of a single GAA transistor; Figure 2(b) shows the size (characteristic scale) of its unit area as 2F*2F=4F 2 , F is the nano-node technology, features The larger the unit area of the scale, the smaller the overall capacity density filled in the memory chip. The top view of FIG. 2(c) is a cylindrical structure (a cube structure if an insulating layer is included). Due to the uniformity of yellow light exposure, the tandem memory cells are presented in a row and square staggered structure. Taking the current GAA 4F 2 as an example, F is about 220-240 nm. Therefore, in a 100mm 2 chip area and a 144-layer stack, a capacity density of 57.6Gb can be manufactured, which is equivalent to storing on an adult's little finger nail. 57.6 billion transistors. |
| summary |
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| FanFET is a newly created 3D transistor structure, which is a 3D-NAND Flash application with innovative characteristics such as vertical current, high density, simple stackability, etc.; because the DUV yellow light machine can complete the process of node technology, it is Only a very small amount of capital expenditure is required to control the cost of the R&D and mass production process. Moreover, memory is the mother of semiconductor chips, which can be used with high-capacity memory cards, SSDs, Embedded Systems, Computing in Memory, cloud systems, robots, self-driving cars, artificial intelligence, and things. Networking and data centers will give full play to their high-performance performance in the future high-speed, high-traffic intelligent integration and more lightweight and compact characteristics, and meet the market's demand for high-volume storage density. |
| FanFET Technical Highlights and Advantages |
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| Hexas Technology’s FanFET has 10 technical highlights. From a technical point of view, the first group is the innovative high-density transistor cell including, |
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| 1. Be a brand new fan-type field effect transistor (FanFET) structure. |
| 2. Be applicable to both transistors and memory. |
| 3. Make multi-layer stacked 3D structure and technology. |
| 4. Increase the memory density per unit area |
| 5. Possess diversified technologies: in addition to stand-alone memory technology, it can be extended to embedded systems and computing in memory. |
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| The second group is extendable Moore’s law indicating FanFET can be ranged from 90 nm to less than 10 nm in node technology. From a commercial point of view, the highlights include, |
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| 6. Get win-win business model and strategic profitability. |
| 7. Make process in Silicon compatibility: The process technology is compatible with the current 12-inch fab. |
| 8. Reduce development costs and increase capacity utilization. |
| 9. Share patent rights: co-sharing patent pool and establishing relevant technical specifications. |
| 10. Establish a complete manufacturing supply chain. |
| About the company and author |
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| Hexas Technology Corporation (Hexas) is a start-up company engaged in R&D and licensing of memory chip intellectual property rights (IP). |
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| We provide an innovative, novel transistor, FanFET, applied to technology services including 3D-NAND flash, NOR flash, and DRAM memory. The roadmap of node technology is from 90 nm to less than 10 nm. |
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| The intellectual property allows customers to realize their future higher-end products, including memory cards for mobile phones, solid-state drive(SSD), DRAM modules, embedded system, and even more computing in memory, and auto pilot, robots, cloud systems, high speed and high-performance AI computation applications. |
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