Hypersonic, page-49

https://www.navysbir.com/n20_2/N202-108.htm

Modeling Neuromorphic and Advanced Computing Architectures

OBJECTIVE: Develop a software tool to optimize the signal processing chain across varioussensors and systems, e.g., radar, electronic warfare (EW),electro-optical/infrared (EO/IR), and communications, that consists of functionalmodels that can be assembled to produce an integrated network model used topredict overall detection/classification, power, and throughput performance tomake design trade-off decisions.

DESCRIPTION:Conventional computing architectures are running up against a quantum limit interms of transistor size and efficiency, sometimes referred to as the end ofMoore’s Law. To regain our competitive edge, we need to find a way around thislimit. This is especially relevant for small size, weight, and power(SWaP)-constrained platforms. For these systems, scaling Von Neumann computingbecomes prohibitively expensive in terms of power and/or SWaP. Biologicallyinspired neural networks provide the basis for modern signal processing andclassification algorithms. Implementation of these algorithms on conventionalcomputing hardware requires significant compromises in efficiency and latencydue to fundamental design differences. A new class of hardware is emerging thatmore closely resembles the biological neuron model, also known as a spikingneuron model; mathematically describing the systems found in nature and maysolve some of these limitations and bottlenecks. Recent work has demonstratedperformance gains using these new hardware architectures and have shownequivalence to converge on a solution with the same accuracy


https://www.navysbir.com/n20_2/N202-099.htm

Implementing Neural Network Algorithms on Neuromorphic Processors

OBJECTIVE: Deploy Deep Neural Network algorithms on near-commercially available Neuromorphicor equivalent Spiking Neural Network processing hardware.

DESCRIPTION:Biological inspired Neural Networks provide the basis for modern signalprocessing and classification algorithms. Implementation of these algorithms onconventional computing hardware requires significant compromises in efficiencyand latency due to fundamental design differences. A new class of hardware isemerging that more closely resembles the biological Neuron/Synapse model foundin Nature and may solve some of these limitations and bottlenecks. Recent workhas demonstrated significant performance gains using these new hardwarearchitectures and have shown equivalence to converge on a solution with thesame accuracy [Ref 1]. Themost promising of the new class are based on Spiking Neural Networks (SNN) andanalog Processing in Memory (PiM), where information is spatially andtemporally encoded onto the network. A simple spiking network can reproduce thecomplex behavior found in the Neural Cortex with significant reduction incomplexity and power requirements [Ref 2]. Fundamentally, there should be nodifference between algorithms based on Neural Network and current processinghardware. In fact, the algorithms can easily be transferred between hardwarearchitectures [Ref 4]. The performance gains, application of neural networksand the relative ease of transitioning current algorithms over to the newhardware motivates the consideration of this topic.