and keep in mind the rise of RISC V
arriving at market leveraging price flexible mass adoption chip integration model in a RISC V space that is about to dominate the design and IP space through price reduction entry and open accessibility ... revolution occurring and weebit arriving at the right time with the right product to leverage yet another revenue stream / market capture
ReRam RISC V subsystem taped out and customer ready ....$$$$$$
June 30th 2022
https://www.eejournal.com/article/risc-v-takes-embedded-world-2022-by-storm/
RISC-V is an open-standard instruction set architecture (ISA) that is provided under open-source licenses that do not require a fee to use. The instruction set, whose specification defines 32-bit and 64-bit address space variants, is designed for a wide range of uses. The base instruction set has a fixed length of 32-bit naturally aligned instructions, and the ISA supports variable length extensions, where each instruction can be any number of 16-bit parcels in length. Different subsets support everything from small embedded systems to personal computers to supercomputers with vector processors to warehouse-scale rack-mounted parallel computers.
JW Insights hot off the press
link:
JW Insights: Both Chinese startups and large IC design companies are embracing RISC-V (laoyaoba.com)
and then of course the open source market capture that awaits ....Google, SkyWater Technology Foundry, Efabless Corporation's prototyping SoC - is famous
https://ef.link/iV1jd
click the link then click the pic and wait a few moments ....it should then play
WBT exceptionally positioned to leverage multiple opportunities that are unfolding in parallel with their commercialisation roll out
news not far away I suspect ......
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