Alright, two freshly online available research works that got WBT's involvement just out there.
https://doi.org/10.3389/fnins.2022.941753
This one was published on 18th Aug 2022. At first I thought this was just a research project that GM involved. Then had a looked at the authors contribution at the end,
Well, this is a project initiated and supervised by Western Digital and using the ReRAM array produced by GM (of which WBT tech must have been applied in the project in some sort of level?)
So would you say Western Digital does not know WBT's ReRAM memory at all and/or the other big guys in this domain are not aware of what is coming out of WBT at all?
The second study is even more relevant. This is not officially published yet, still in the pre-print server and is publically available on the 4th of Aug.
https://arxiv.org/abs/2208.02651
Just look at the author list there, the two big guys from WBT that we all know of; and the two other employees there, both are PhD from Politecnico di Milano, the institute already on WBT's collaborator list. The project was supervised by Dr. Manan Suri, another big guys from Indian Institute of Technology - Delhi, also onboard with WBT a while ago.
Just have a look into the abstract claim and considering the level of achievement there, this first available 130nm subsystem module must have gone into really late stage of everything. They might have already gone into 28nm incorperation for more advanced system, we just don't know it.
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