CXO888 / any other attendees, page-38

That is a great read Flec. Awesome use case for ReRam also. Why would we continue with the multiple-layered technology solutions and interoperability challenges that exist in existing architectures when a simpler, tuneable solution could exist in the one memory (interface or cells). If we extend that article into a concrete example, let’s say Tesla. The article covers the need for Edge AI code storage and rapid data processing for use cases like collision detection, break optimisation etc. which means they want DRAM or faster at tiny geometry and if we could add non-volatile code storage that would be great. But the need for massive processing in terms of SCM still exists. Dojo, Tesla’s new supercomputer is huge and is processing data coming back from all of the cars (globally) and providing guidance back to the cars. Feels like we are in a really unique position. If we could crack retention (even though the BOD say it’s not that important) then some cells could be tuned to long retention for code storage and other cells could be optimised for processing with bugger all retention. Thanks for posting that article.