The basic characterisation and metrics will still be possible. Speed, endurance, retention.
It's not so much that the testing results will be "incomplete" it's that the 4DS array can be operated in a previously unidentified way.
That is, with the right control layer on top, you can individually program each cell to perform a different storage function, rather than hitting every cell that needs to be written with the same voltage, for the same duration. That's how DRAM works. every cell is refreshed inside the refresh cycle. The write voltage is the same because it needs a specific signal to write it.
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