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    INTERESTING ARTICLE to read regarding Neuromorphic Capabilities that are required in Phase I & 2 for NASA 2020 & 2019 below...


    NASA SBIR 2020 Phase I Solicitation

    H6.22 Deep Neural Net and Neuromorphic Processors for In-Space Autonomy and Cognition

    Lead Center: GRC

    Participating Center(s): ARC

    Technology Area: TA11 Modeling, Simulation, Information Technology and Processing
    Scope Title
    Neuromorphic Capabilities
    Scope Description
    The Neuromorphic Processors for In-Space Autonomy and Cognition subtopic specifically focuses on advances in
    signal and data processing. Neuromorphic processing will enable NASA to meet growing demands for applying
    artificial intelligence and machine learning algorithms on-board a spacecraft to optimize and automate operations.
    This includes enabling cognitive systems to improve mission communication and data processing capabilities,
    enhance computing performance, and reduce memory requirements. Neuromorphic processors can enable a
    spacecraft to sense, adapt, act and learn from its experiences and from the unknown environment without
    necessitating involvement from a mission operations team. Additionally, this processing architecture shows promise
    for addressing the power requirements that traditional computing architectures now struggle to meet in space
    applications.
    The goal of this program is to develop neuromorphic processing software, hardware, algorithms, architectures,
    simulators and techniques as enabling capability for autonomous space operations. Emerging memristor and other
    radiation-tolerant devices, which shows potential for addressing the need for energy efficient neuromorphic
    processors and improved signal processing capability, is of particular interest due to its resistance to the effects of
    radiation.
    Additional areas of interest for research and/or technology development include: a) spiking algorithms that learn
    from the environment and improve operations, b) neuromorphic processing approaches to enhance data
    processing, computing performance, and memory conservation, and c) new brain-inspired chips and breakthroughs
    in machine understanding/intelligence. Novel memristor approaches which show promise for space applications are
    also sought.
    This subtopic seeks innovations focusing on low size, weight and power (SWaP) applications suitable lunar orbital
    or surface operations, enabling efficient on-board processing at lunar distances. Focusing on SWaP-constrained
    platforms opens up the potential for applying neuromorphic processors in spacecraft or robotic control situations
    traditionally reserved for power-hungry general purpose processors. This technology will allow for increased speed,
    energy efficiency and higher performance for computing in unknown and un-characterized space environments
    including the Moon and Mars.
    Page 1 of 3
    Phase I will emphasize research aspects for technical feasibility and show a path toward a Phase II proposal.
    Phase I deliverables include concept of operations of the research topic, simulations and preliminary results. Early
    development and delivery of prototype hardware/software is encouraged.
    Phase II will emphasize hardware and/or software development with delivery of specific hardware and/or software
    products for NASA, targeting demonstration operations on a low-SWaP platform. Phase II deliverables include a
    working prototype of the proposed product and/or software, along with documentation and tools necessary for
    NASA to use the product and/or modify and use the software. In order to enable mission deployment, proposed
    prototypes should include a path, preferably demonstrated, for fault tolerance and mission tolerance.
    References
    Several reference papers that have been published at the Cognitive Communications for Aerospace Applications
    (CCAA) workshop are available at: http://ieee-ccaa.com.
    Expected TRL or TRL range at completion of the project 4 to 6
    Desired Deliverables of Phase II
    Prototype, Hardware, Software
    Desired Deliverables Description
    Phase 2 deliverables should include hardware/software necessary to show how the advances made in the
    development can be applied to a cubesat, small sat, and rover flight demonstration.
    State of the Art and Critical Gaps
    The current State-of-the-Art (SOA) for in-space processing is the High Performance Spaceflight Computing (HPSC)
    processor being developed by Boeing for NASA GSFC. The HPSC, called the Chiplet, contains 8 general purpose
    processing cores in a dual quad-core configuration. Delivery is expected by December 2022. In a submission to the
    STMD Game Changing Development (GCD) program, the highest computational capability required by a typical
    space mission is 35-70 GFLOPS (million fast logical operations per second).
    The current SOA does not address the capabilities required for artificial intelligence and machine-learning
    applications in the space environment. These applications require significant amounts of multiply and accumulate
    operations, in addition to a substantial amount of memory to store data and retain intermediate states in a neural
    network computation. Terrestrially, these operations require General-Purpose Graphics Processing Units (GPGPUs), which are capable of teraflops (TFLOPS) each -- approximately 3 orders of magnitude above the
    anticipated capabilities of the HPSC.
    Neuromorphic processing offers the potential to bridge this gap through a novel hardware approach. Existing
    research in the area shows neuromorphic processors to be up to 1000 times more energy efficient than GP-GPUs
    in artificial intelligence applications. Obviously the true performance depends on the application, but nevertheless
    the architecture has demonstrated characteristics that make it well-adapted to the space environment.
    Relevance / Science Traceability
    The Cognitive Communications Project, through the Human Exploration and Operations Mission Directorate
    (HEOMD) Space Communications and Navigation (SCaN) Program, is one potential customer of work from this
    subtopic area. Neuromorphic processors are a key enabler to the cognitive radio and system architecture
    envisioned by this project. As communications become more complex, cognition and automation will play a larger
    role to mitigate complexity and reduce operations costs. Machine learning will choose radio configurations, adjust
    for impairments and failures. Neuromorphic processors will address the power requirements that traditional
    computing architectures now struggle to meet and are of relevance to lunar return and Mars for autonomous
    operations, as well as of interest to HEOMD and SMD for in-situ avionics capabilities.

    ===============================================================================================================================================================================================================================================================================================================================================================

    NASA SBIR 2019 Phase I Solicitation

    H6.22 Deep Neural Net and Neuromorphic Processors for In-Space Autonomy and Cognition

    Lead Center: GRC

    Participating Center(s): ARC

    Technology Area: TA11 Modeling, Simulation, Information Technology and Processing
    Machine Inferencing and Neuromorphic Capabilities
    The Deep Neural Net and Neuromorphic Processors for In-Space Autonomy and Cognition subtopic is focused on
    computing advances for the space environment based on neurological models in contrast to von Neumann
    architectures. Deep neural net and neuromorphic processors can enable a spacecraft to sense, adapt, act and
    potentially learn from its experiences and from the unknown environment without needing a ground mission
    operations team. Neuromorphic processing will enable NASA to meet growing demands for applying artificial
    intelligence and machine inferencing and learning algorithms on board a spacecraft that is energy efficient. These
    demands include enabling on-board cognitive systems to improve mission communication and data processing
    capabilities, provide sensory processing onboard to optimize communication bandwidth and latency, enhance
    computing performance, and reduce memory requirements. Additionally, deep neural net and neuromorphic
    processors show promise for minimizing power requirements that traditional computing architectures now struggle
    to meet in space applications.
    The goal of this subtopic is to develop deep neural net and neuromorphic processing hardware, software,
    algorithms, architectures, simulators, and techniques as an enabling capability for autonomy in the space
    environment. Additional areas of interest for research and/or technology development include:
    Deep neural net and neuromorphic processing approaches to enhance data processing, computing
    performance, and memory conservation.
    Spiking neural net algorithms that learn from the environment and improve operations.
    New brain-inspired chips and breakthroughs in machine understanding and intelligence.
    Novel memristor, MRAM, and other radiation tolerant devices that can be incorporated in neuromorphic
    processors which show promise for space applications.
    This subtopic seeks innovations focusing on low size, weight, and power (SWaP) processing suitable for CubeSat
    operations or direct integration with sensors in the harsh space environment. Focusing on SWaP-constrained
    platforms opens the potential for applying neuromorphic processors in spacecraft control situations traditionally
    reserved for power-hungry general-purpose processors. This technology will allow for increased speed, energy
    efficiency, and higher performance for computing in unknown and uncharacterized space environments.
    Phase I will emphasize research aspects for technical feasibility and show a path towards a Phase II proposal.
    Phase I deliverables include concept of operations of the research topic, simulations and preliminary results. Early
    development and delivery of prototype hardware/software is encouraged.
    Page 1 of 3
    Phase II will emphasize hardware and/or software development with delivery of specific hardware and/or software
    products for NASA targeting demonstration operations on a CubeSat platform. Phase II deliverables include a
    working prototype of the proposed product and/or software, along with documentation and tools necessary for
    NASA to use the product and/or modify and use the software. Hardware products should include both layout and
    simulation. Sample chips – from device level on up – are encouraged. Software products shall include source for
    government use. Proposed prototypes shall demonstrate a path towards a CubeSat mission. Proposals should
    include a strategy for tolerance to radiation and other adverse aspects of the space environment.
    Background, State of the Art, and References
    The current state-of-the-art (SOA) for in-space processing is the High-Performance Spaceflight Computing (HPSC)
    processor being developed by Boeing for NASA Goddard Space Flight Center (GSFC). The HPSC, called the
    Chiplet, contains 8 general purpose processing cores in a dual quad-core configuration; initial hardware delivery is
    expected by December 2020. In a submission to the Space Technology Mission Directorate (STMD) Game
    Changing Development (GCD) program, the highest computational capability required by current typical space
    mission is 35-70 GFLOPS (billion floating-point operations per second).
    The current SOA does not address the capabilities required for artificial intelligence and machine inferencing and
    learning applications in the space environment. These applications require significant amounts of multiply and
    accumulate operations, in addition to a substantial amount of memory to store data and retain intermediate states
    in a neural network computation. Terrestrially, these operations require general-purpose graphics processing units
    (GP-GPUs), which are capable of TFLOPS (1012) -- approximately 3 orders of magnitude above the anticipated
    capabilities of the HPSC.
    Neuromorphic processing offers the potential to bridge this gap through novel hardware approaches. Existing
    research in the area shows neuromorphic processors to be up to 1000 times more energy efficient than GP-GPUs
    in artificial intelligence applications. Obviously, the true performance depends on the application, but nevertheless
    neuromorphic processing has demonstrated characteristics that make it well adapted to the power-constrained
    space environment.
    Neuromorphic computing is a technology to tackle the explosion in computing performance and memory
    requirements to meet growing demands for artificial intelligence and machine learning. While the commercial
    market for these processors is in its infancy, there is a growing community of small businesses that have been
    funded by Air Force and Department of Energy grants toward development of neuromorphic capabilities. These
    companies continue to make great strides in neuromorphic processor technology including new devices such as
    memristors. This subtopic would put NASA in a position to join its partners in the DoD and DoE to enable a
    research area that shows tremendous application for space.
    The Cognitive Communications Project, through the Human Exploration and Operations Mission Directorate
    (HEOMD) Space Communications and Navigation (SCaN) Program, is one potential customer of work from this
    subtopic area. Neuromorphic processors are a key enabler to the cognitive radio and system architecture
    envisioned by this project. As communications become more complex, cognition and automation will play a larger
    role to mitigate complexity and reduce operations costs. Machine learning will choose radio configurations, adjust
    for impairments and failures. Neuromorphic processors will address the power requirements that traditional
    computing architectures now struggle to meet.
    The expected TRL for proposals is 4-6.
    References:
    Several reference papers that have been published at the Cognitive Communications for Aerospace
    Applications (CCAA) workshop are available at: http://ieee-ccaa.com.
    A survey paper on neuromorphic computing and neural networks in
    hardware: https://arxiv.org/pdf/1705.06963
    References for deep neural network and neuromorphic computing can be found in IEEE, ACM, and
    conference archives such as NIPS and ICONS (International Conference on Neuromorphic Systems)

    Page 2 of 3
 
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