It is an interesting thought - how do you go about sharing a wafer? A. Do they produce combined masks when the same deposition/etching step is to be carried out on the individual geometries? B. Do they blank out the other chips when a corresponding step to be performed on one chip is not required on other chips?
I guess that producing a shared wafer would include more steps than producing a wafer for a single type of chip, for example, due to B above.
Once they start, I don't think that there would be any interruptions to the process until the wafer was completed. All the mask sets would have been tested and verified. So, hopefully, the wafer should be produced in schedule.
(20min delay)