Hi Branded,I guess the commercial exegiencies of getting to market would explain why Foxconn went with Hailo.
As you point out, that does not exclude Socionext from including Akida in its Synquacer offerings when the chip is available.
Hailo do have a patent for their NN Processor:
https://worldwide.espacenet.com/patent/search/family/063669456/publication/WO2018185762A1?q=WO2018185762
The patent does not make reference to spikes and seems to have a different architecture from Akida.
I think there will be scope for Akida to supplant hailo when the chip is available. The usual caveat about the initial 18 month blackout on patent applications applies.the invention comprises a general-purpose computing device 11. Computing device 11 comprises central processing unit (CPU) 12, host/PIC/cache bridge 20 and main memory 24. The CPU 12 comprises one or more general purpose CPUcores 14 and optionally one or more special purpose cores 16 (e.g., DSP core,floating point, GPU, and neural network optimized core).
1. A neural network (NN) processor circuit for performing neural network calculations for an artificial neural network (ANN) having one or more network layers, comprising:
a plurality of computation circuits, each computation circuit including computing elements, associated dedicated memory elements, and related control logic and operative to process an input data stream associated with the ANN;
wherein said plurality of computation circuits are aggregated in multiple levels to form a hierarchy; and
wherein higher levels in said hierarchy are generally more complex and include a smaller number of instantiations than lower levels.
There are several related patents. One which deals with power saving is:
https://worldwide.espacenet.com/patent/search/family/072335363/publication/US2020285949A1?q=US2020285949US2020285949A1Structured Activation Based Sparsity In An Artificial Neural Network
- Bibliographic data
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Applicants
HAILO TECH LTD [IL]Inventors
BAUM AVI [IL]; CHIBOTERO DANIEL [IL]; DANON OR [IL]; NAHOR GILAD [IL]
Publication
US2020285949A1·2020-09-10Published as
Structured Activation Based Sparsity In An Artificial Neural Network
Abstract
A novel and useful system and method of improved power performance and lowered memory requirements for an artificial neural network based on packing memory utilizing several structured sparsity mechanisms. The invention applies to neural network (NN) processing engines adapted to implement mechanisms to search for structured sparsity in weights and activations, resulting in a considerably reduced memory usage. The sparsity guided training mechanism synthesizes and generates structured sparsity weights A compiler mechanism within a software development kit (SDK), manipulates structured weight domain sparsity to generate a sparse set of static weights for the NN. The structured sparsity static weights are loaded into the NN after compilation and utilized by both the structured weight domain sparsity mechanism and the structured activation domain sparsity mechanism. The application of structured sparsity lowers the span of search options and creates a relatively loose coupling between the data and control planes.
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