2021 BRN Discussion, page-7378

Not quite as simple BS.

CMOS (and TTL although TTL have different voltages) signals are also voltage signals.

You correctly state that digital is referred as a 0 or a 1. However the 0 and the 1 are voltage levels.

Pretty well everything is voltage levels in electronics, snd it’s just how they are used.

For a CMOS gate operating at a power supply voltage of 5 volts (it can be 10 volts, or other supply voltages), the acceptable input signal voltages range from 0 volts to 1.5 volts for a “low” logic state(a zero), and 3.5 volts to 5 volts for a “high” logic state(a one). You are correct that digital circuitry is not as sensitive to noise, and is due to the value of the threshold voltages.

You will notice that there is cushion of 2 Volts between low and high (0 and 1) values. This is sometimes referred to as noise margin.

This is a basic explanation as there is more to this theory and also there are different CMOS systems that operate from different supply voltages, but the concept is similar.