This is the main claim of Tachyum's patent application...

This is the main claim of Tachyum's patent application WO2020037112A1.

https://worldwide.espacenet.com/patent/search/family/069524071/publication/WO2020037112A1?q=WO2020037112A1

1. A computer hardware device having a clock speed and a clock cycle, the device comprising:

a plurality of arithmetic logic units (ALU) within a data path including a first, second and third ALUs, the second ALU being within a locally predefined range of the first ALU and the third ALU being outside of the locally predefined range of the first ALU, wherein the locally predefined range is smaller than the data path;

the device being programmed to execute a series ofinstructions stored in a non-transitory memory to perform operations, the operations comprising:

first assigning a first instruction operation to the first ALU;

first determining, for a second instruction operation having an input that depends directly on an output of a first instruction operation, whether all inputs for the second instruction operation are available within a locally predefined range from the first ALU; second assigning, in response to at least a positive result of the first determining, the second instruction operation to the second ALU;

in response to a negative result of the first determining:

ensuring a pause of at least one clock cycle will occur between execution of the first instruction operation and the second instruction operation; and

third assigning the second instruction operation to an ALU of the plurality of ALUs.


"being programmed to execute a series of stored instructions" is the hallmark of von Neumann computing.