4DS 3.23% 9.0¢ 4ds memory limited

2023 CHART THREAD, page-334

  1. 4,270 Posts.
    lightbulb Created with Sketch. 8295
    it works - at 40nm
    attempting to scale to 20nm and get performance metrics - encountered a process fail - etch / mask with underlying anneal oxidation between the film and the pcmo
    TEM and root cause performed - holders never informed as to cause design / operational failure in detail imo
    Micron established many years ago in pcmo that in scaling it is subject to litho interference on tight features with misaligned etch margins - ??? potentially as no one was ever informed of the extent with 4ds product offering imo
    known issue historically:
    photomask complexity at/below 20nm in pcmo
    process margins in overlay / cdu lwr to be established....essentially edge placement errors and line width die crossover
    materials and metrology challenges were overcome
    4DS have encountered what describe as similar process issues that register as manufacturing process failure that prevents electrical test access

    your post is wrong and frankly a figment of nonsense
    'That eventually changed everything, but nobody cared by then. If they'd realised that at the start it would have been "heh the tech actually works as intended, but the interface needs a bit more work. Easy peasy." I.e. Management had to have a proper trouble shooting and options assessment with the engineering teams before opening their mouths just because they were embarrassed they had screwed up and basically didn't trust their diversity hire, who they should not have put in that role in the first place. The only certainty in life is that stuff will go pear shaped, and a good management team expects that, allows for it and keeps cool under fire while they find a strategy that doesn't involve setting fire to the house because someone broke the TV.'
    this lift from your post reflects nothing ....absolutely nothing of accuracy except your lack of understanding (being very kind)
    go and read the threads here by some very educated posters on this memory innovation in development here and you would be embarrassed by the nonsense you wrote imo

    It is entirely possible there will be another fail
    it is just as likely there will be a successful test based around the process modifications undertaken by IMEC - one of the pre eminent development facilities in the space .....'their diversity hire' ???? is the best in the business !!!

    as far as the mask / etch issue potentially a tighter exposure control threshold may have been a simple fix for the likes of IMEC ...and a performance / data assessment may now be possible at test

    either / or ...we will all know soon enough

    good luck to all here


    Last edited by Flectional: 28/07/23
 
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