so Green - pl7 validation lot ie defect density / reproducibility etc done in parallel with blue test chip design and verification leading to ( if all goes well in PL6/7 ) memory test chip fabrication and testing 2H/2026
all done in IMEC imo - dumb to run a 'tech transfer' for a test chip yet to be manufactured in a foundry line - time and cost not feasible for the foundry without complete test chip data set ( tooling, parametrics etc) particularly on new material and new emerging technology
in there is also the pass / fail of the access platform manufacture ( not just design) and 'read'
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(20min delay)