A method of generating schedules for an adaptive embedded system, the method comprising: deriving task sets of all possible tasks to be performed by the embedded system; deriving sets of all possible hardware configurations of the embedded system; creating a multi-model system having a multi-model defining the adaptivity of the system for all possible tasks and all possible hardware and all combinations thereof, the adaptivity defining how the system can change operation responsive to a mode change requirement and/or occurrence of a fault; solving a scheduling problem for the models of the multi-model system in a neuromorphic accelerator implemented by spiked neural networks; and providing schedule instructions to the system, for performance of tasks, based on the solution
Reference except:
0063] The neuromorphic accelerator, using SNNs, can be implemented in various known ways, e.g. on an FPGA as described, for example, in C. Frenkel, M. Lefebvre, J-D Legat and D. Bol, ‘A 0.086-mm212.7-pJ/SOP 64k-Synapse 256 Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28-nm CMOS,’ IEEE Transactions on Biomedical Circuits and Systems, vol. 13, no. 1, pp. 145-156, 2019,or using a specific ASIC peripheral as in e.g. Brainchip Akida Neuromorphoc Core.
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