4DS - Anything but Charting, page-11531

The strange pursuit of the second Platform Lot (PFL)

Summary of decisions concerning Non-platform Lot (NPFL) and Platform Lot (PFL)

o August 10 2020 Company Update : Second NPFL (after additional wafer lot) will be avaible in Q4 2020 – Second PFL will be avaible in early Q1 2021

o October 28 2020 Company Update : The second PFL wafers are being fabricated so as to contain dense memory arrays with transistors that are able to select memory cells

o December 2020 Company Update : Identified some further refinements to process conditions for the second PFL. The second PFL will commence in Q1 2021 (after some were being fabicated as per October 28 ann ?)

o January 20 2021 Quarterly Activity Report : Second NPFL has been received in late december 2020 (no announcement) expect to complete analysis end of january 2021. Second PFL fabrication date to be confirmed when NPFL results will be released

o January 28 2021 Trading Halt announcement : To provide an update on the manufacture of the second PFL wafers.

- Two ways to look at it.

o Negative. They met with some problems to add transistors to select 4DS Cells on the PFL wafers and the second PFL has to be postponed to find a way to overcome these problems

o Positive. They found that with the results of the second NPFL (wich they know since late december), they could change their technical approach and forget about transistors. The array could work without them (as hinted at in many research papers). Or something like that.

- Negative announcement arguments :

o 4DS history is full of delays and hicups.

o There is a sense of urgency in the January 2021 quarterly report that seems to indicate that they are not totaly confortable with the situation (people working 7 days a week…).

o The Trading Halt could be to add as much time as possible to find the best wording for announcing more delays.

- Positive announcement arguments :

o In the past, trading halt was always used to announce important and mostly positive things. For the update of September 20 2018 wich announced the worst news in 4DS history, they didn't use a trading halt.

o Since June 24 2020 and the announcement of the results of the additional wafers lot, they entered in what can be viewed as the corporate phase of the project (huge and hardly justified capital rising, creation of the sale bonus pool, hiring of Drs van den Hoek, …). This doesn't fit with the story of a company that is still fighting to build something that works. This rather give the impression that the Mbit array is not so important, even if it seems to be needed to show something to futur clients who are not in the know, as WDC is.

o There is an enormous amount of research paper on the problems of staking a ReRam cells array. It is not realistic to think that 4DS people discovered this problem in 2020 when trying to build their Mbit array. They have talked of the stacking performance of non-filamentary ReRam since 2013 and before. That has always been the main problem for ReRam. For that reason, the pursuit of the Mbit array looks like a nice story to tell to the market when other things are going on undercover. They are buying time, imo.


o This is not to say that every problems are solved (they are still discovering things as per HD comments at the last AGM). But the main problem is to tune the cell in a way that will allow it to stack at a competitive cost. It seems that a large part (not all) of the problems met in building an affordable ReRam memory can be solved at the cell level.
Almost all research papers on the stacking problem of ReRam memory only look at filamentary ReRam. It means that if the 4DS cell shows some characteristics that provide a solution to what all those researchers were looking for, the 4DS cell in itself will rise enormous interest in the semiconductor scientific community. And that will have a value for large companies.
So a company like WDC wich have many ingineers working on this in their labs, doesn't need a Mbit array to prove the technology. Because they know that if you build the cell in that way or in that other way you will met what is needed to stack layers of ReRam cells at low cost. Fot them everything will be derisked long before the functionning Mbit array is built in Imec labs. Imo.
Just have look at the research papers about staking ReRam cells. those peoples live in the intimate complexity of the technology. They don't need a functioning Mbit array to be convinced.

https://scholar.google.fr/scholar?start=70&q=reram+stacking+transistors&hl=fr&as_sdt=0,5&as_vis=1

CONCLUSION

- There is still a risk that they will simply announce more delays for the second PFL without giving more details. In this case, shareholders will suspect that they met with some real technical problems in making a functionning Mbit array. The price will retrace, giving some shareholders an opportunity to jump back in.

- But, as they use trading halt to announce important things, there is a good chance that they will announce a change in their strategy concerning the second PFL.

- What that could be is anyone guess. But something logical could be that they decided to "manufacture" the Mbit array in WDC labs or Sandisk fab in Japan. WDC would return them a functionning Mbit memory wich they could show to futur clients. WDC could be paid by getting the licence for free. That would allow 4DS to announce a first licence agreement to the market, later in Q1 2020.

NO FINANCIAL ADVICE