4DS 2.35% 8.7¢ 4ds memory limited

4DS - Anything but Charting, page-15047

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    Not sure brother, but what I do know is that these 3 patents sitting with 4DSinc and the Big Sesh.. are vitally important as they relate to the unique control mechanism... And the company was claiming 10nm back in 2013 so the nodal points of 28 and 13 nana metres (13 being the key cost/benefit crossover point for full adoption of the new tech from WDC's existing production calcs.
    Patents Assigned to 4DS, Inc.
    • Publication number: 20140206138
      Abstract: A memory device is disclosed. The memory device comprises a first metal layer and a first metal oxide layer coupled to the first metal layer. The first metal layer is also coupled to a second metal oxide, which in turn is couple to a second metal layer. The formation of the first metal oxide layer may occur in-situ when the first metal oxide layer has a Gibbs free energy that is lower than the Gibbs free energy for the formation of the second metal oxide layer. Control of the oxygen vacancy or ion concentrations of the first metal oxide layer and the second metal oxide layer is utilized in the information and the operation of the memory device. Selection of a dielectric constant and a thickness of the first and second metal oxide layer may be utilized to result in similar electrical field stress across the first metal oxide layer and the second metal oxide layer and improve the cycling robustness and data retention for the memory device.
      Type: Application
      Filed: March 15, 2013
      Publication date: July 24, 2014
      Applicant: 4DS, Inc.
      Inventor: 4DS, Inc.
    • Publication number: 20140169070
      Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer.
      Type: Application
      Filed: February 21, 2014
      Publication date: June 19, 2014
      Applicants: 4DS, Inc
      Inventor: Dongmin Chen
    • Publication number: 20140117298
      Abstract: A resistive memory device is disclosed. The memory device comprises one or mo re metal oxide layers. An oxygen vacancy or ion concentrations of the one or more metal oxide layer is controlled in the formation and the operation of the memory device to provide robust memory operation.
      Type: Application
      Filed: March 15, 2013
      Publication date: May 1, 2014
      Applicant: 4DS, Inc.
      Inventors: Dongmin Chen, Lee Cleveland, Seshubabu Desu, Kurt Pfluger, Jean Yang-Scharlotta

    And the company was claiming 10nm back in 2013 so the nodal points of 28 and 13 nano metres (13 being the key cost/benefit crossover point for full adoption of the new tech from WDC's existing production calcs.) ref below

    https://hotcopper.com.au/data/attachments/3252/3252821-3db5eece20d4b2ac9a96512fa2bccf50.jpg
    https://hotcopper.com.au/data/attachments/3252/3252827-fd7e7a3516f896df3a21e97c2f5cc150.jpg
    https://hotcopper.com.au/data/attachments/3252/3252820-68d9de489b388c3cb6bfcbe46a7697d0.jpg

    2.2.2. Mott Memory Based on the principle applications of Mott insulators, a Mott Memory is designed. The materials which can go through the metal-to-insulator transitions are especially useful to this kind of applications [15]. The electronic–structural phase changes in the complex oxide thin films can develop the memory phenomena. The Gibbs-free-energy-modulation-based working principle is the driving force of writing and reading operations of the Mott memory devices, as illustrated in Figure 5. With external stimulation, the initial stable phase, i.e., state “0”, can be broken by a phase transition process, and the system goes through to the metastable phase, i.e., state “1”. One can consider that the system resistivity can undergo a transition from an insulating to a metallic phase. Hence, the stability of the state depends on the kinetics of the phase transition.

    The there is this little trick.... Whereby the tech can be eNVM one way or VM (Volatile Memory) .... One way to juice it up, the other cold storage...

    And the fact you can do both if the level of control is sorted out means the worlds largest game of data centric musical chairs just got owned Each time the music stops playing and the power goes out....... hahahaha

    If the kinetic energy barrier is higher than the thermodynamic driving force, the device can experience a stable metastable state “1”, and the memory behaves as eNVM one (Figure 5d). In reverse, for a small kinetic energy barrier, the memory behaves as VM one (Figure 5e).
    https://hotcopper.com.au/data/attachments/3252/3252822-ebea45d3a949ccd29937f650a44878a9.jpg
    The behavior is also thermally dependent. It is also possible to realize VM and NVM operations within a single material system in optimized temperatures. As compared to DRAM and SRAM memories, the major advantage of Mott memories is its two-terminal design with cross-point array with 4F2 cell area size (F is the minimum chip feature size) with faster Mott transitions than Flash. The demonstrated write energy per transition is sub-100 fJ in a Mott memory, which can be further scaled down with area scaling.
 
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