I would assume that IMEC may have suggested it was resolvable based on the initial thought it was IMECs error.
Most likely when they got together on the same test bench the realisation that the issue was greater than both anticipated.
We are also assuming that IMEC have never tested an NVM in their Mb chip so it's response was new ?
Not likely to be confirmed or denied based on secret squirrels , masonic hand shakes and NDAzzzzz.
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