The Etching Problem .............
Hi 8tey,
Did you find any information about this etching problem ?
(sorry If you had already posted something about it )
I think it's the main question now.
Is this etching problem something easy to solve or not ?
- If not, we will certainly need two or three more years to have something to show.
And, it means some changes in the nature and the scope of the company, imo.
- If it's not so difficult, we could be out in six months.
I suppose that it all depends of the nature of the problem : Material used ? Etching technology used (EUV or another one)? something unknown ?
Here are two articles that explain, in simple terms, what kind of problems arise when you go down below 10 nm.
Etching seems to be one of the hardest nuts to crack.
But it also indirectly confirm that we are now working at small geometries.
No other NVM Company seems to be there.
Breaking The 2nm Barrier
Mark LaPedus
Chipmakers continue to make advancements with transistor technologies at the latest process nodes, but the interconnects within these structures are struggling to keep pace.
The chip industry is working on several technologies to solve the interconnect bottleneck, but many of those solutions are still in R&D and may not appear for some time — possibly not until 2nm, which is expected to roll out sometime in 2023/2024. Moreover, the solutions require new and expensive processes with different materials.
Until then, the industry will continue to deal with several issues in advanced chips, which consists of three parts — the transistor, contacts, and interconnects. The transistor resides on the bottom of the structure and serves as a switch. The interconnects, which reside on the top of the transistor, consist of tiny copper wiring schemes that transfer electrical signals from one transistor to another. Today’s advanced chips consist of 10 to 15 layers, each incorporating a complex copper wiring scheme and connected using tiny copper vias.....More
https://semiengineering.com/breaking-the-2nm-barrier/
Etching Technology Advances
Let’s get really, really small.
That directive from leading semiconductor companies and their customers is forcing the whole semiconductor supply chain to come up with new ways to design and manufacture ever-shrinking dimensions for chips. The current push is to 10nm and 7nm, but R&D into 5nm and 3nm is already underway.
To put this in perspective, there are roughly two silicon atoms in 1nm of line width in a chip. That helps explain why industry has adopted atomic layer deposition (ALD) first, and why it is now moving to atomic layer etch (ALE).
These are extremely tiny dimensions, and profits are high for companies that can develop ways to improve productivity. Etch is an important tool in the arsenal. Uday Mitra, vice president of strategy and marketing for etch and patterning at Applied Materials, says the etching equipment market was worth $6.2 billion in 2015, up from $3.9 billion in 2014. ALE is the next big opportunity in this space, and it has drawn the attention of some of the largest equipment makers—Applied, Lam Research, Tokyo Electron and Hitachi High-Technologies.
... More
https://semiengineering.com/etching-technology-advances/Much interested to read others opinion about this.
vde
