4DS - Anything but Charting, page-22842

Last August the sp was 21.5c at the time the TH hit and had been oscillating between 20-25c for the most part of the immediate lead-up.

Let's look at a sliding doors scenario...

What if the PL2 megabit array functioned? Not only would the sp have rallied and re-rated on expected metrics, but we were also hit with two unexpected positives being speeds 10x DRAM at the smallest geometries available at imec using state of the art equipment.

Where do you think the sp would have got to?

So, if 20c was the speculative benchmark for DRAM speed at 28nm, where will it sit come August this year and where will it go if 4DS is successful? I struggle to see how this success wouldn't warrant an orders of magnitude change in sp.