I do agree in parts, but the second platform lot did scale to...

I do agree in parts, but the second platform lot did scale to small geomtries. so somewhere between second and third In the change made the issue. Non platform lots are all fine, the first platform lot was fine. (Apparently) I think we should be at Stanford completing things a little quicker than what imec is doing. why are we waiting so long for a platform lots we don't know work, just complete 4 or 5 wafers and test. We don't need 30 wafers that don't work.
Very doom and gloom at the moment, but in reality it's imecs process that is what's creating the issue.