Hey King, thanks for your reply Sir.. And yes I too believe the process changed before PL2, largely unbeknownst to those who shall not be disclosed to, in order to possibly facilitate the change to crystalline 2D nanosheet structures..
Because that is what Industry wants/needs, yes...
That said, if WD or whomever has the PCMO recipe and IMEC the transistor array (assumed to be vertical or 3D) then 4DS seems to have been caught holding the can and ergo responsible for the input of others..
Tough place to be in at the best of times, let alone on a project with all eyes on the deadline deliverable.
Their lack of any real forward plan when the gig was up would lend itself to the "external entity issue" theory?
Although both WD & Imec been eyeballing "next gen" off for a while now so one wonders how they'd be caught with their hands down their pants.
The US embargo on all things 3nm & below getting into Chinese hands seems coincidental but you'd never know once Uncle Sam pulls the National Security card which has already been announced as potentially squeezing Samsung. Plus Dong Min Chen aint exactly considered a "Good ol Boy" by the establishment...
For Info, PIAI Spac have their EGM to vote on the extension scheduled for the 7th of Sep.. Will watch with curiosity how that pans out cause if it wasn't 4DS then I'm curious as to who they'd targeted as announced.
There are some new players coming into focus now and the new boosted dynamic Nand SSD's seem pretty capable of playing the Persistent Memory role in Optanes absence..
So I hope for everyone's sake the answer to a series of vexing questions comes sooner rather than later..
GLTAH 8tey
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