everything else aside:
the test results out of fremont once the next iteration is in house will tell the story
it remains more than a highly speculative play here due to these ' resolved' issues
know one will know they are resolved till they prove themselves to be exactly that....
the 'etch' is resolved?
Winbond resolved it with their pcmo rram etch process and patented same and proceeded no further with the development - the issues compound the more you try to scale the process node
Sony - exactly the same material same outcome
Micron - exactly the same material same outcome
DRAM is of course where you want to play with non volatile memory - what a game changer if it can be found and developed AND provide cost adoption advantage
each of the three stated above found the following:
PCMO is extremely hard to etch due to the instability of the mask process - they do not remain in intact and 'interact' adversely with the underlying the underlying layers
This issues compounds as you scale as does rto chamber quality control ...temp v area of process node
this results in random residues and corrosive oxidisation across the die
each of these companies report any successful etch outcome in the manufacture of pcmo as a non volatile memory cell remains too low for commercial application.
Each have patented their solution to the issue and successfully manufactured at 'legacy' process nodes with poor yield where no commercial material manufacturing yield/cost advantage is achieved .....no cost benefit for adoption
Each have failed to scale as the material is not temp v process node resilient
plenty on the web...
eg
winbond
excerpt by way of example
More particularly, the invention provides a method and device for patterning films of PCMO (Pr0.7Ca0.3MnO3) using an etching process. Merely by way of example, the invention has been applied to a resistive material for resistance random access memory (RRAM) devices. But it would be recognized that the invention has a much broader range of applicability. For example, the invention can be applied to microprocessor devices, memory devices, and application specific integrated circuit devices.
Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as each process used in IC fabrication has a limit. That is to say, a given process t
ypically only works down to a certain feature size, and then either the process or the device layout needs to be changed. An example of such a limit is the ability to pattern certain materials for memory devices. These materials include PCMO, which has been proposed for RRAM devices.if nothing else this this paragraph is quite particular:
plasma conditions can provide practical etch rates for NiFe and related materials. Unfortunately, limited work has been performed in the CMR materials. It is considered difficult to etch the thin film of PCMO because of non-volatility of etch byproducts from Pr, Ca, and Mn, and possibly others. Ion mill can not provide enough mask selectivity which will be a serious concern as the device size continues to shrink beyond 0.13 um technology.Winbond patent publication date for the etch mask resolution was 2007 - remains active till 2024
Fremont testing if successful will then require cost competitive analysis to be proven if any sale is to be realised.
the overriding take away is the big boys had a go and did achieve an operational outcome with the material in rram but did not proceed to develop that opportunity - no cost competitive advantage in doing so.
it is a hard nut to crack even with a successful test outcome on the next iteration - the company will need to prove commercial viability for a sale to occur...but im only guessing for all the usual reasons
this is not my opinion - it is the current state of play
plenty on the web to fact check all of this and more
Great weekend to all 
(20min delay)