it works....it has worked for years at legacy process nodes - specifically 50 and 40nm
more recently in spiking neural networks
2021
Dept. of Mat. Sci. and Eng., Pohang University of Science and Technology (POSTECH), Pohang, Korea
We demonstrated Pr0.7Ca0.3MnO3−x (PCMO) based Electro-Chemical Random-Access Memory (ECRAM) to achieve excellent on-chip training efficiency and inference accuracy. Accelerated oxygen ion migration through electrolyte at elevated temperature (ET) provides linearity and symmetry of weight update, multi-level conductance states as well as excellent retention (10 8 s) characteristic. We also evaluated the ET training using 1k bit PCMO ECRAM array and proposed a temperature compensating trans-impedance amplifier (TC-TIA) to solve conductance miss-match issue that degrades on-chip training accuracy. By adopting ET-training, we can improve both on-chip training efficiency and inference accuracy for hardware neural network (HNN) applications.
HGST - IMEC - 4DS - Micron - Sharp - Sony etc etc .....there are quite a few players who know it works and have had a dabble and continue to dabble at those legacy nodes
it has conductance mismatch when scaled - oxidisation that is exacerbated by mask etch that operates on a temp co-efficient that is not compatible with the pcmo temp annealing req. node scaling
Accelerated oxygen ion migration through electrolyte at elevated temperature (ET) provides linearity and symmetry of weight update, multi-level conductance states as well as excellent retention (10
8 s)
( funnily enough exactly how the cousin operates with oxygen migration alternating between a crystalline state and a non crystalline state...HRS to LRS ) niehter have a physical 'filament' so all the jabber about filamentary and non filamentary is nonsense....
both operate through heterogeneous oxygen migration ...funny hey...the oxygen vacancy forms and acts as the 'filament'
the validation needed to bust this next swing door wide open is successful wafer yield from PL4 with the issue raised above
solved ....
this is not IMECs task- they simply bake & manufacture to spec - 4DS receive and begin initial testing ....suggest it will be known very quickly whether the issues are resolved and there is a functional cell/wafer at scale
it is a total punt ...red or black?...same same because we don't hear anything for whatever damn reason
so not so experimental in reality ....may well pop out in the next few years in neural networks as the race inot AI compute in memory is really heating up and leading edge is not a prerequisite ....cim removes the cpu and frees up space and provides power and processing efficiency gains with memory...nvm memory ....highly sort after i would imagine
I could of course be completely wrong
all the best to all
