4DS - Anything but Charting, page-27678

I'm sitting at work, @Cguv , and thus am somewhat disadvantaged to research further, but I have a recollection of the chip being proven to work in the lab at 28nm ... it must be a couple of years ago now.

The discussion was also around the fact that the technology was easily scale-able because of the non-filamentary nature of the process interface compared to other technologies which rely on filaments forming and being removed, and so it was announced at the time as a bit of a (yawn) fait accompli that it was successful, and the scaleability point had been proven.

If they do pursue a smaller form as part of megabit certification, one would think that it would be a fairly straight forward operation, knowing that scaling the chip is not an issue. It will be interesting to see where any development would lead, as I would imagine that it would be generated by requests from prospective purchasers, and would then give a hint as to how they intend to use the tech. Will they chase size, retention, speed ....?