Hi Flectional, You wrote: “ die cracks in the run should be...

Hi Flectional, You wrote: “ die cracks in the run should be expected at 20nm till the process is refined -”

Even though ‘processor’ chips have been scaled down well beyond 20nm, my understanding is that ‘memory’ chips have not yet so far cracked 20nm. I don’t know your background or expertise, only that your posts are often technically focused, very informative and very relevant. Saying that, are you able to comment on whether or not these ‘die cracks’ that are somewhat expected are specifically related to PCMO or would you expect this problem to occur in other mediums as well. Is this problem one that has a high degree of ‘fixability’ with
refinement in the process work? In other words should we share Ting’s confidence that he can get the job done?

Thank you for your excellent posting history on 4DS.