It's simple and I have mentioned this in previous posts. The...

It's simple and I have mentioned this in previous posts.

The metrics don't mean anything until they are metrics from testing the 1MB chip. Wafer metrics are not what matters, the company has stated this multiple times, a MB chip gives statistical significant metrics on speed, endurance, retention, yield. From there, a memory manufacturer can make informed decisions etc. etc.

Furthermore, as stated in recent announcements, the speed and endurance they have achieved with additional wafer lot is the best yet, which means they are also setting new records themselves, albeit wafer testing.

I believe their most recent update is more than satisfactory. They complied a memory array with the first platform lot, THEN they made a strategic decision to add transistors to the 2nd platform lot and providing that goes well and they learn enough/what they need to from the 2nd platform lot, they will then manufacture a 3rd platform lot with full control logic. This was communicated as a strategic decision that was made after testing first platform lot to ensure the best outcome, I have no reason to doubt what the are stating.