"What bothers me about the announcement most is that the 3rd non platform lot was allegedly to sure-up the data set and an opportunistic use of spare equipment time (seems logical), but then the outcome is:
New process breakthroughs have made 4DS’ Interface Switching ReRAM technology fully compatible with state-of-the-art“ high-volume DRAM and NAND production processes"
Isn't that sureing up the dataset? IMEC have demonstrated that the process window works on the best fab gear out there, that has a potential pathway to scale down to sub 10 nm node sizes and has improved read speed by 10X
4DS can say, "we've run the process window on all these machines and we get the same result"
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