The misconceptions and misreads on this release by some that have spiraled into the tech is non functional is comical to read.
Ill go back
to the 3 big phrases focused on the 'results of the third non platform lot' which had so many intrigued ( me included) at the last announcement - previous to this one.
compatible with advanced processes in todays leading edge high volume memory DRAM and NAND factories ...tick
the reduction in cell-on resistance directly translates to a significant improvement in read speed.....tick
that performance improvement (point 2)means that full characterisation (speed endurance and retention) of memory cells with this fully crystalline PCMO........needs to operate in a memory array under current control by way of access devices / selectors .....tick ( new and required development)....is it a value add and continuing derisk of this technology yes! huge if the projected outcomes are achieved.....huge ! how is that a failure of this technology ffs?
Its the mo of any start up in the space
IMEC are proceeding ........further massive derisk and validation of the process......extended time horizon, sure, so be it.
kudos
@hashtagyolo....picked it like a nose.
that opportunity cost / return will be well worth the wait....thats why IMEC are proceeding......reputation ....nope. Reputation follows success....it is not chased by intent to succeed - (that is called hope and this is not the business of hope that so many here write about - expressing their own reflection perhaps - the facts are on the table)
they intend to pursue this path to facilitate (Guido) Reram integration into a megabit memory platform....IMECs' megabit memory platform to achieve the needed
full characterisation of the memory cells.
What is it then (for the lay person like me who is investing here) that IMEC bring - they bring design flow and operability to this PCMO material ......ground breaking stuff ( that is why thread to thread - product to product comparisons that some engage in is so juvenile....there is no measurement benchmark for this technology .....(4DS PCMO) it is new......it is non comparable by that very definition. doh!
do the wafers work ...yes they do - 250 mill additional NRE not required ....
they work!do they need a respin -
no they don't - 25 mill in additional mask outlay saved !SAVINGS !!!!!!
as i said, it is not comparable.....so the IP continues to be developed and patented.
IP = design flow + metadata
So IMEC and 4ds proceed to achieve full characterisation = $$$$$$, this is the opportunity point for acquisition - achieving full characterisation of the metrics.....
( conspiracy theories of secret backroom deals and goings on ...ffs.....about what?......to make an offer now for acquisition and win an incomplete inoperable PCMO DRAM device......nope! )
it needs this 'characterisation' in hand ....4DS know it, IMEC know it - any acquisition by a cartel wanna be knows it
IMEC are the current development partner ...in good hands i would say. ( In IMECI trust)
from here - full characterisation /verification through IMEC = defined meadata on process ( repeatability and transferability as already established $$$$) and version development / use for this 'access device'
IP wrapped around the now developing current control access device to achieve these end game characterisation metrics (speed endurance and retention) for a successful integration into IMECs megabit array.
apologies for the lengthy post - wet saturday here in sydney and with time to think and digest the release 'technical update'
Im more than happy
the reason for the mystery third non platform Lot are clear now I believe and were clearly the focus back then by IMEC and 4DS ....as it now appears
plenty here with more knowledge on this than me so happy to be corrected as always
GLA
