You'd say that there will be an increased burn rate now potentially with running concurrent activities right? Like we are progressing our initial platform lot alongside our WD collaboration additional wafer lot. If the current burn rate with salaries included is around 1.1 mil, and R&D (ie fees to imec) are a fair chunk of that, it's very possible that our burn rate will increase to somewhere in the vicinity of 2 mil, meaning that this is exactly the sort of buffer you would want if this is stretching into H1 next year.
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