Ann: Appendix 4D & Half-Year Financial Report, page-61

hahaha getting all rather covert & cover up here at the moment, burner emails??? ..

And whilst I may not be able to shed much light on things it is possible that external elements played a part in the timeline going right and it's possible that the IMEC agreement was re-jigged instead of re-written perhaps, much less paperwork and F'ing around that way.

Now noting that this extract below references the ICON project at Imec the contracts will be written largely the same with respect to standard events, force majeure being one.. Now I can't see anywhere that either party wished to claim it but we know the states was in turmoil in November and Belgium didn't fair well either, though the eggheads in the fab actually ramped up??


Standard contract term which says if things go pear shaped lets talk... So there may be provision there because up till Nov things looked on track.

4DS 28/10: Timing on track the Second Non-Platform Lot wafers should be available for analysis in mid to late Q4 2020; the Second Platform Lot wafers are expected to be available for testing in early Q1 2021.!!

Now the fabs were pumping but I dare say logistics across Belgium were Scheißenfest

From the Imec website
"Imec’s 200mm and 300mm Fabs showed a 10% increase in volumes and output in 2020 compared to 2019. While the whole of Belgium went into a strict lockdown in March-April and again from November onwards, the operational teams at imec managed not only to keep the Fabs running at all time, but even realized record outputs. An outstanding achievement, considering the Fabs are one of the key differentiators in enabling imec’s advanced semiconductor research strategy".

Then in next update in December we get told the wafers were successfully manufactured...However,

4DS 10/12: The process of agreeing to timetables and costs may take the parties past the expiry date of the current agreement, being 1 January 2021. The Company will update the market once the extension has been finalised.

4DS 10/12: Based on the very limited available time slots on imec’s state of the art equipment, imec committed that the Second Platform Lot wafers will commence mid Q1 2021. 4DS is investigating all means to bring that timing forward.

4DS 10/12: advises that both Belgium and the San Francisco Bay Area counties, which includes Silicon Valley, have again had restrictions put in place which are aimed at slowing transmission of COVID-19 after an acceleration of COVID19 infections. The Company continues to monitor these restrictions and will update the market if they are expected to have a significant adverse effect on the Company’s operations.

However, also in Dec we get told that the agreement with Imec would likely extend beyond Jan 1 and that both parties had copped the covid shaft.. But that Imec, being ever resilient as a Belgian trait, committed at that point to a run in mid Q1 (Feb), so it might be assumed there was a mechanism in place that allowed the run to proceed as early as 27 Jan.

So something appeared to slew right during November, as the timeline clearly slipped, and whether it was covid based and forced a material change to the agreement isn't communicated anywhere, but could be a possibility.. Even if not the rewrite of a new agreements appears to be quite acceptable to follow up afterwards. Noting that the Belgians adopt a can do attitude towards formal arrangements and the pesky paperwork.


"The definition of retroactive is that something goes into effect as of a prior date. An example of retroactive is when you are charged fees for service from the start of the month even if you don't sign a contract for the service until the 10th day of the month".

Seems they love nothing better than a beer, a sausage and getting on with the job at hand.. and if we go all the way back to the previous extension in 19 both parties agreed that, prior to some dude eating a pokemon Wuuhan, 12months was enough time to do the deed and that on completion they will have produced a megabit memory chip.

4DS 28/11/19: Further to its announcement on 3 October 2019, 4DS Memory Limited (ASX:4DS) (4DS or the Company) is pleased to advise that 4DS and imec have agreed on the terms of the extension to their collaboration agreement.The agreement extension will enable the Company to pursue its objective of demonstrating that it has a production compatible process for its proprietary technology on imec’s CMOS megabit memory platform. The extension is foran additional twelve months, commencing 1 January 2020, and the Company is targeting the production of a megabit memory chip within this timeframe.

The fact that Imec have kicked off already is IMO a good sign, one echoed by Guido on the 1st Feb ann & that they are looking to close out the original agreement deliverables.. Also we might assume they are happy to run on an interim status whilst the paperwork is tweaked & signed as this doesn't look to be long term engagement perhaps?..
Announcing the date does give away the expected finish of the platform lots and we do know that 4DS does play a little "3 card monty" with dates at times.. I don't think Imec would care so much, as evident in the normal start now sign later approach they adopt..

Regardless of the mechanism, there still doesn't seem to be anything in place to extend beyond.. Which is either an oversight or perhaps this is the culmination and once Imec beds it all down in a few weeks that will be it. ?

We know the company was pleased with the preceding results and that meant Imec immediately went to work on the next lot with the dense array & control logic fitted as reported on 1 Feb that production had commenced on jan 27th.

And that:

"The learnings from the Second Non-Platform Lot have been incorporated into the process split conditions for theSecond Platform Lot of 300mm wafers. The Second Platform Lot is using imec’s memory platform, and containsdense memory arrays with the control logic necessary to read and write selected bits and bytes"

"The results from the analysis of the Second Platform Lot are expected to pave the way for 4DS and its partnersto pursue their strategic objective of fabricating wafers with chips that operate as fully functional megabitmemories, and which have been produced using state of the art industry fab equipment"

Now it takes 6 weeks on average for the company to roll through the manufacturing process based on historical timelines and this is in alignment with other approximations.. At which point it is possible that barring any disaster, Imec will have fulfilled their obligations as per the original agreement.

Because as we were told in the Dec announcement, which referred to the Oct ann, which again referred to the August ann;

4DS 10/12:"As stated in the Company’s ASX announcement dated 28 October 2020, the analysis of Second Non-Platform Lot and Second Platform Lot will potentially enable 4DS and its partners to progress to fabricate wafers with all the control logic necessary to read and write selected bits and bytes, and thus be able to operate as a fully functional megabit memory

4DS 28/10:"As stated in 4DS’ announcement dated 10 August 2020 following consultation with imec and Western Digital, the Second Platform Lot wafers are being fabricated so as to contain dense memory arrays with transistors that are able to select memory cells".

4DS 10/8: "The objective of the Initial Platform Lot was to test the integration of dense memory arrays without the complexity of transistors. 4DS validated the integration process, and recent meetings and discussions have identified process steps and conditions that are designed to benefit the fabrication of the Second Platform Lot".

"Significantly, the outcome of development discussions is that the Second Platform Lot will be fabricated to contain dense memory arrays with transistors that are able to select memory cells.This is a major strategic decision to better ensure success in 2021 when, based on the results of this Second Platform Lot, 4DS and its partners will potentially progress to fabricate wafers with all the control logic necessary to read and write selected bits and bytes, and therefore be able to operate as a fully functional megabit memory."

"Both lots of wafers will be fabricated with variations of the process conditions from the best wafer in the Additional Wafers Lot, which had exhibited the biggest improvements in speed and endurance in the Company’s history".

Results pending, which of course are required to confirm the achievement and prove process variables, the way it is written it says that

At the completion of the run they will have produced a wafer with all the control logic required to read and write selected bits & bytes and therefore be able to operate as a fully functioning megabit memory. Seems they may have combined some elements in the last run but it appears that on confirmation that the wafers have been successfully manufactured then Imec's job is done.. Break out the beer & bratwurst.. circa

Plus it is not often these two company reps tag on to the bottom of a release.. I counted once on the 3/10/2019 when they announced they were integrating the technology on to the bench at Imec and the release on Feb 1.. I'd say there may be only one more to go.. 8tey

So I got 10-3-2021 you can tell Nutsy as a finish and then like the American election the results we wait for confirmation of the inevitable till around the 27-04-2021... Pure speculative late night guesswork and wild prediction only...

"Drs. Wilbert van den Hoek, 4DS’ Chairman, commented “Industry players want to know that a new memory technology can be produced commercially, using industry standard fab equipment. 4DS is well advanced on this path, and the commencement of the Second Platform Lot is another significant step forward.”

4DS’ Managing Director, Dr Guido Arnout stated that “We are pleased that the success of the Second Non Platform Lot has meant that we were able to immediately commence fabrication of the Second Platform Lot. We are grateful to our partner, imec, for scheduling a slot in its state of the art fab in such a timely manner, particularly given the high demand for access to fab equipment in the current semiconductor market environment.”

3 Oct 2019
Chief Executive Officer and Managing Director, Dr Guido Arnout, commented “Having fabricated and tested around one hundred 300mm wafers, over 4 iterations, we believe we know how to repeatedly produce our memory on state-of-the-art production equipment. We are excited to be progressing to imec’s megabit platform and look forward to ultimately producing a megabit memory chip”.

Chairman, Mr Jim Dorrian commented “The joint decision with imec to now integrate our technology with imec’s megabit platform represents a significant step forward, and is a credit to the hard work and dedication of Guido and his technical team. We are delighted with the continued support we receive from imec, as well as from our joint development partner, Western Digital.”