Mj, You're a good man.
From an engineering perspective, I see the challenge going from 60nm to 60nm. Not 60nm to 20nm.
From PL4 to PL5. This is where the true challenge is for me.
Obviously, while PL4 worked, it has/contains multiple flaws. These need to be eradicated prior to PL6, as everyone knows, any minute imperfection in PL4 will come across as Mount Kosciuszko in PL6.
For example, the last 4 years part time, I have been building a PROTOTYPE (classic one off cafe racer motorcycle).
I finished it, then took it apart to clean and refit with oil and grease etc in the right places and with tension of nuts and bolts.
While it worked, I have been caught with my pants down with the amount of times i have had to modify spacers or make adjustments where none existed before. The nature of the beast.
This has taught me that the real issues need to be addressed and fine tuned in PL5. This has to be the reason both Imec and 4ds has wisely chosen 60nm to 60nm is the only way forward.
The transition to PL6 i believe will work, but that depends on PL5. We may have to squeeze another PL5 (PL5.1) to achieve that.
Sounds scary, but, if it takes a month to make a chip in normal circumstances, and with Ting and Guido, combined with Imec's top 8 scientists all focused on the DORY platform with no other manufacturer having access/slots to interrupt the process, we may have a chance.
The question i have is, if we are alone on this dory platform, are they able or do they intend to run a few versions of PL5 to accelerate the fine tuning.
If so, we could achieve the impossible.
Thoughts anyone.
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