Patch, the Infineon design is to bypass limitations that have...

Patch, the Infineon design is to bypass limitations that have been identified with the IMEC megabit platform with respect to 4DS RERAM, not to deal with shortcoming in the fabrication of the memory cells themselves, or some sort of "failure" that has occurred.

I think that's important for everyone to realise. They will still be able to proceed with fabrication of PL6 and provide those headline speed/endurance figures. There is just additional information they want to glean from the memory arrays that they can't obtain.

The issue is completely in the uncertainty that is now swirling over access to capital. To that I'm not sure why DM decided to go to brokers right before Christmas.