I'd like to see the reference to that 10nm etch dim81. I might...

I'd like to see the reference to that 10nm etch dim81. I might have missed it, it would be a really big thing. Fine saying they are doing it, if you have a company statement that they are. I haven't found it yet.

Only reference to any scale I've seen was in 2018 where it said 40nm, Replacement USA Marketing Presentation-August 2018 Release Date: 29/08/18 17:55 and highlighted below. This made sense since FLASH cant go under 40nm and this provided a solid comparison point for your tech. Its also a lot cheaper to engineer at 40nm where the tolerances are easier to manage than at 10nm.

The IMEC 1MB carrier is at 40nm and it makes sense that the etch would be at 40NM although given the carrier is Back End of Line (BEOL) it is conceivable that a tighter scale array is being integrated with the carrier at a bigger etch.

Scaling down is a big thing. If there has been a change in density, and IMEC's Belgian 300mm line can etch down to 7nm but this is a serious scaling process. When you shrink down you have to check effects at each reduction and MOTT effect will need particular care since its based on a particular set of circumstances. Simplest analogy is a spark plug, make the plug smaller you still have to make the spark gap the same size regardless of the shrink to get the spark effect. With chip shrink, some things shrink down and others stay the same to keep the thing functional.