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  1. 4,443 Posts.
    lightbulb Created with Sketch. 1829
    Its a 40nm 1MB chip patience. There is no roadmap beyond this at present.

    Who is going to take them to this magical sub 10nm the presentation goes on about if they don't have a R&D partner like IMEC? They are not working at 40nm now, all of a sudden they are talking DRAM limitations and why something else is needed. Is retention a problem stopping them going after Non-volatile?

    I'd be concerned on this business pivot given the years of pushing non-filamentary reram as the cure to NVM's problems and now its DRAM the torpedos.

    It doesn't smell right, but nothing has for a while.
 
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