My assumption (guess) is that the wafers are tested as they exit...

My assumption (guess) is that the wafers are tested as they exit the FAB line to define which dies are "good". This is likely the function of the new testers Fred talked about. I also assume the yield is now high enough to send the entire wafer in a protective cassette to the packager. The packager can select and singulate the "good" double-sided silicon dies from the wafer without generating any debris - i.e. not by sawing them up. (Laser cutter? Don't know, but obviously clever!) The packager is presumably using the metallisation equipment that has already been shown to work well with the wafers/dies. The packager then presumably is the one who marries up the dies up with the ASIC by soldering the ASIC to the newly metalled MEMS connectors, then overpackages them into the typical component plastic housing, while at the same time incorporating the dust protective film into the package. This protects the MEMS and electronics, and the finished chips are stable and will be ready for use. They probably come out on tape for automated insertion onto PCBs. They are still vulnerable in this state to being poked (like the ones displayed at the 2018 AGM were)

Just to pour cold water on any conspiracy nutters ideas of this all being a scam, here again are my photos of the chips in my hand and in a display box. You can see the "poke damaged" films on some chips. You can see the innards of a chip that is not packaged. You can see a demonstrator unit (prototype?) What more do you want to know? This is how close we have been in the past, but with MEMS that did not work as hoped. Now we have MEMS that have been described as ready to demo as soon as they are packaged.