So im inclined to agree with this - particularly with the added...

I guess history says it'll trade sideways until the news comes out that there is a progress towards a commercially viable technology.

the non-platform lot success and platform lot success annoucements have all previously been met by positive SP movement. Opposite for PL3 failure.

So im inclined to agree with this - particularly with the added context that the 4DS team have already engaged analysis (like Lodge) to get an understanding of the tech so that when a "PL6 success" announcement lands, they already know what that means... I would say it even ramps quicker





i have a technical question for @koutham

need a bit of help checking my interpretation of the recent annoucment and what it means for PL6, particularly this part:

"Whilst this Platform vehicle has been useful to 4DS to further develop and characterize 4DS’s technology during 2023 and 2024, the Company is also uncovering shortfalls of using a universal memory Platform vehicle.

To further advance the Company technology, to the path of commercialization, 4DS needs a customized memory macro Platform vehicle that is specifically designed for its unique area-based Interface Switching ReRAM characteristics."


Would you say the red highlight doesn't suggest that the imec platform won't work for PL5 or PL6? Could we read this ad "it's been good to help is characterise read/write speeds, retention, power consumption, endurance so far".

So following that logic - could we still feel confident that for PL5 and PL6 they could still show those performance characteristic results on the existing platform??


Next the blue but: are they saying they need Infineon so they can achieve the feature of programming different areas of the same chip with different characteristics? Or developing the capability that allows the customer to program that themselves? (I.e. a platform that allows control over different areas of the chip having longer retention than other parts). They've recognised that the imec platform can't ever get it there? maybe same with analogue programming...

Could area based programming and analogue programming be seen as bonuses (i.e. not necessarily the techs core capabilities)? If it's faster than DRAM, has decent endurance and uses less power and is non volatile at 20nm, won't we still have a game changer??

so if there's nothing here suggesting that they can't demonstrate these outcomes with imec, PL6 seems on track...?