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Ever the basement hole digger and eternal pessimist! The wafers...

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    Ever the basement hole digger and eternal pessimist!

    The wafers go through a whole series of processes during their manufacture. Taking a random selection and evaluating the successful fabrication of the steps leading to the critical issues, i.e. those that have previously given problems, is not only vital but significant in that they now know that the solutions they came up with actually work, and that the process used ensures that future compliance is built in.

    With previous runs the subsequent steps were shown not to have been problematic, so now there is a reasonable expectation that they will also not now be source of new problems.

    The conclusion? There is now good reason to expect that this run will get the big tick of approval and deliver fully functional and valid wafers.

    But just to cover themselves, AP is still doing everything in its power to patch up the previous batch if at all possible, just in case. Useful to know what can be done even if only for future reference.

    We have also already been told that there have been no problems with the integration stage, and that it has already been worked out with the previous lot of faulty MEMS devices. So again we can expect that once the wafers are validated and approved we will be on track to having demonstrable chips - on schedule.

    Of course we cannot rule out the low but inescapable possibility that the sky could fall. So there is most certainly scope for you to pick up your shovel again.
 
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