Those asking about 60nm
thats the limitation of the testing equipment at imec so that's what they built for PL4 to prove the fixes with the etch process and prove it can function in a megabit array.
Previous lots have proven the cells work at lower geometries - and the announcement confirmed this thing is scalable to smaller geometries
"imec’s megabit arrays have a lower limit of 60nm for a memory cell but 4DS testing has demonstrated that ourReRAM scales consistently across available cell geometries on megabit arrays."
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