I wanted to just dig a little deeper into this topic around scaleable geometries. we are told in the announcement that '4DS's goal has always been to look to take advantage of the uniqueness of its technology as an area based Re-Ram. Imec's megabit arrays have a lower limit of 60nm for a memory cell BUT 4DS testing HAS demonstrated that our ReRam scales consistently across available cell geometries on megabit arrays' . This is clearly stating that it can be scaled to smaller geometries it's stated clearly. Now if we look at the development of NAND flash chart below we can see that those same geometries that 4DS ReRam can scale to include the most recent 10nm from 2018. The major difference will be the speed and endurance which we already know to be superior to NAND Flash. Re-Ram was always going to supersede the DRAM and NAND flash memory classes we just didn't know it would be in one hit like the way 4DS has just delivered it !
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