Ann: Positive results achieved with 300nm 4Kb memory array cells, page-33

40nm means our technology is of similar size to current flash memory sizes and seems to be the best size for high yielding high profit production. Depending on the die size of our memory chips it will determine how many chips we will be able to get from a 300mm (12 inch) wafer.

The issue is how many squares you can fit in a circle efficiently. Fabricators normally ask themselves would I rather produce 200 chips for ABC company or 50 chips for YYZ company and which will be the most profitable for me since it cost me around $3 billion to setup my factory. The answer quickly becomes obvious and which is why scale is so important these days.

Think of it like a slice of pizza, you can sell 200 slices of pizza or 50 slices all at say $100 per slice, this is the difference between mass production 40nm memory and say 300nm which is where we are currently at. You can only produce so many pizza's per pizza shop and to setup a new pizza shop costs many billions of dollars.

Weebit has also demonstrated that our tech works on 5nm filaments so we can scale beyond 40nm memory cells theoretically. Each time we scale down we have more slices of pizza to sell per pizza. Hope this helps you understand the situation.



Changing and retooling is not a cheap process as mentioned by Weebit and among many others. I've attached a link discussing the issues regarding trying to get wafers from 300mm to 450mm and the extreme costs involved in doing so. This is like trying to build bigger pizza bases, they weren't very successful from reading this article.

https://www.extremetech.com/computi...appening-time-soon-major-consortium-collapses