POSITIVE RESULTS FROM SECOND NON-PLATFORM LOT•Data from the...

POSITIVE RESULTS FROM SECOND NON-PLATFORM LOT

•Data from the Second Non-Platform Lot demonstrated that the results from First Non-Platform Lot were repeatable
•Insights from the Second Non-Platform Lot were incorporated into process conditions for Second Platform Lot
•Production of the Second Platform Lot commenced at imec on 27 January 2021
•Results from this Second Platform Lot are expected in Q2 of 2021

Background

On 24 June 2020, 4DS announced the results of its analysis of the Additional Wafers Lot (being the First Non-Platform Lot of 300mm wafers). The First Non-Platform Lot was fabricated with process condition contributions from Western Digital and imec.

The 24 June 2020 announcement stated “it [4DS] has measured the highest speed and endurance in the Additional Wafers Lot that have ever been recorded by the Company:

−The best recorded speed at near DRAM speed exceeds Storage Class Memory requirements without the need for speed crippling error correction;
−Endurance is two to three times better than previously reported. Actual endurance may be significantly higher but is currently not quantified due to available lab time and test equipment capacity; and
−The Company also measured retention and the results remain confidential to the Company and its partners until such time as the upper limits of retention can be more accurately defined.”

Second Non-Platform Lot

Further to the update provided in the Company’s Quarterly Activity Report dated 20 January 2021, 4DS confirms that it has now completed its testing of the Second Non-Platform Lot.

The Company is pleased to report that the data from the Second Non-Platform Lot:

−Confirmed that the Company has been able to repeat the results for each of the key memory characteristics (speed, endurance and retention) that were achieved with the First Non-Platform Lot;
−significantly, 19 of the 21 device wafers were functional, a first for the Company (the two nonfunctional wafers were the result of being manufactured outside the imec process window); and
−provides 4DS with further valuable insights with respect to how changes in key process parameters affect these key memory characteristics; i.e. which changes increase which memory characteristic.